Archive: 7 posts

---

Don't you hate it when you wire things up and when they seem they should just go from point A to point B, but they dont? http://www.lbpcentral.com/forums/attachment.php?attachmentid=47561&d=1390069798 I found an easy fix to this, and it seems to work very well, it works like this So first you start out with your basic wiring, like this http://www.lbpcentral.com/forums/attachment.php?attachmentid=47562&d=1390070709 Then you have to put a node behind the input of the final destination of the wire like so http://www.lbpcentral.com/forums/attachment.php?attachmentid=47563&d=1390071337 Then It will send the wire directly to the input without any pathmaking of the wire Here is an example of what I mean http://www.lbpcentral.com/forums/attachment.php?attachmentid=47564&d=1390071515 I hope this helped all of you with your wiring issues if you may have had them before (you can stack nodes to create intersections, as nodes do not replace each other, well im not sure about off a microchip, but they do not replace each other on a microchop)

2014-01-18 19:01:00 Author: amiel445566 Posts: 664

---

Put this in the Tutorial section.

2014-01-19 11:41:00 Author: GribbleGrunger Posts: 3910

---

This is actually pretty amazing.

2014-01-20 02:43:00 Author: Kalawishis Posts: 928

---

Does this help with the massive amount of lag you can get when trying to place new logic on a crowded microchip?

2014-01-20 10:31:00 Author: Ali_Star Posts: 4085

---

Nice tutorial, quite useful actually! I don't think it well affect the complexity of the wiring inside a microchip. But maybe it does? I mean, everyone hates the grid that the wire follows, so it must be pretty complicated. -- Jauw

2014-01-20 22:44:00 Author: Jauw Posts: 484

---

I'm actually not sure about if it affects the complexity of wiring, but I wouldn't be surprised if it reduced the lag produced by pathfinding I'll try to test this soon, its a great question bugging me as well

2014-01-21 00:13:00 Author: amiel445566 Posts: 664

---

This is pretty cool, thanks. It looks like any gate that blocks input or output ports will stop wire pathfinding. You can also stack regular gates on top of nodes for some reason. Here's a pic showing this: http://i.imgur.com/9YW7sDs.jpg In terms of thermo, nodes seem to take up the same amount of thermo as regular gates. Does this help with the massive amount of lag you can get when trying to place new logic on a crowded microchip? I dunno why OP hasn't got back to you on this but yes, it does. If you do it for all wires in a complicated chip there'll be no more lag.

2014-01-27 18:12:00 Author: Ayneh Posts: 2454

Posts: 1077139    Threads: 69970    Members: 9661    Archive-Date: 2019-01-19

Aus dem Archiv wurden alle persönlichen Daten wie Name, Anschrift, Email etc. - aber auch sämtliche Inhalte wie z.B. persönliche Nachrichten - entfernt.
Die Nutzung dieser Webseite erfolgt ohne Speicherung personenbezogener Daten. Es werden keinerlei Cookies, Logs, 3rd-Party-Plugins etc. verwendet.