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#1

logic lag

Archive: 22 posts


I have a couple microchips that have so many wires that when I click on a wire to move it the game freezes for a second and then unfreezes for a second and then freezes for a second ect until I let go of the wire. I was wondering if it will lag at all in play mode, because so far nothing lags in play mode and that's great, but I'm also not done with the level so I'm going to add alot more logic to the game.2011-08-20 06:46:00

Author:
CardboardBoxMan
Posts: 60


Circuits and wires aren't drawn at all in play mode so that 'layout lag' won't be a problem. I've never seen any amount of logic cause performance issues in play mode (and I've built some huge circuits). Objects and decorations and visual things affect performance far more than logic ever will.2011-08-20 07:06:00

Author:
Dr C
Posts: 122


Circuits and wires aren't drawn at all in play mode so that 'layout lag' won't be a problem. I've never seen any amount of logic cause performance issues in play mode (and I've built some huge circuits). Objects and decorations and visual things affect performance far more than logic ever will.

I think this is true to an extent. In my Checkers level, there is a high amount of logic, but not that many objects, and it does create some lag.
2011-08-20 11:57:00

Author:
Ali_Star
Posts: 4085


You could also try spacing out your logic and make it more neater.2011-08-20 14:53:00

Author:
zzmorg82
Posts: 948


USe as many microchips as possible, to keep it clean. That gets rid of some logic lag.2011-08-20 16:05:00

Author:
fighterwindplus
Posts: 403


Another option is to build your logic outside of the chip (on light matter for example) and move it onto a chip later.
It may get messy but there will be no wire lag.
2011-08-20 17:07:00

Author:
Radishlord
Posts: 706


You could also try spacing out your logic and make it more neater.

Spacing logic out on a chip doesn't get rid of wires. I tried this when I made the logic for him. (He remade it. But I gave him the original piece.) It just doesn't change the amount of wires. Also, you cant just add more chips to the same chip. That doesn't reduce the amount of wires either.
2011-08-20 18:29:00

Author:
Speedynutty68
Posts: 1614


Objects and decorations and visual things affect performance far more than logic ever will.
That is true. I have about 3 chips that lag this bad and they really don't affect the thermo. Then I add some water to the level and the thermo jumps up 2 bars.
2011-08-20 20:10:00

Author:
CardboardBoxMan
Posts: 60


Ok i think i need to step in here

@Cardboardboxman's posts:
1: It will not lag in play mode, and will lag less in preview. create your logic OUTSIDE of the chip Then put them in
2. They were talking about Framerate strains. Water takes up 2 bars due to assets, however it doesn't impeed on technical preformance.

@Dr.C: unless it's stickers, no. Having enough detail to impeed the game takes just as much if not more effort than logic.

@zzmorg82:
- That can make it more messy in some cases, as well as hard to use.
- It doesn't help the issue (which is in fact: wires)

@ghost500: WRONG. More micros= More thermo. And since the amount of logic and wires is not changed, there will be no change in lag.

@Radishlord: Agreed. The problem is the wire lag, not the logic itself. Stupid, i know!
2011-08-23 02:05:00

Author:
a_mailbox
Posts: 416


Wire lag is worse in LBP2 IMO. I just end up working around it. If your not currently working on a chip, minimize it and tweak it so outgoing wires are not displayed.2011-08-23 05:18:00

Author:
tanrockstan34
Posts: 1076


You can also name the outputs by selecting the edge of the chip and tweaking the wire edge. It can help doing this because you don't need to open the chip to move wires around.

Like others I agree about minimising logic sections into their own chips once they are working.
2011-08-23 15:32:00

Author:
Mr_Fusion
Posts: 1799


I've found that compartamentalizing your logic into as many sub-units as possible works wonders, because it's open microchips that cause the most lag (in my very limited experience.) If you can close the ones you're not working on, I believe you'll find the lag will drop significantly.

Try isolating your logic by function, then working on the logic in bits and pieces. Keep the ones you're not currently working on closed.
2011-08-23 15:57:00

Author:
schm0
Posts: 1239


After just testing my level with a friend, I am EXTREMELY disappointed to find that it's a bit laggy. Now, this may be down to my internet connection partly, but there is also a lot of logic involved in a fairly small space.

If I was to increase the size of the game area, would that reduce lag? Basically, my game area is on a 24 x 26 medium grid board. If I change it to a 24 x 26 large grid board, would that help? Or would that make it worse?
2011-08-23 21:10:00

Author:
Ali_Star
Posts: 4085


Logic lag usually won't appear in play mode. What Cardboard means is that when he grabs a wire, the lag starts. When he lets it go, it goes away. It's simple as that. It happens when you have too many wires. Increasing level size doesn't change it. Increasing microchip count won't fix it. And minimizing won't fix it since it's all on 1 chip. I would go with creating off a chip then dragging back on like many others have suggested.2011-08-24 02:06:00

Author:
Speedynutty68
Posts: 1614


Logic lag usually won't appear in play mode. What Cardboard means is that when he grabs a wire, the lag starts. When he lets it go, it goes away. It's simple as that. It happens when you have too many wires. Increasing level size doesn't change it. Increasing microchip count won't fix it. And minimizing won't fix it since it's all on 1 chip. I would go with creating off a chip then dragging back on like many others have suggested.

It's not the chips that are laggy, it's the level itself. Like I said, it could just be a connection thing, and the fact that the level is based in such a small area probably has some effect.

But either way, I need to know if scaling the level up, spacing things out a bit more, will reduce the lag.
2011-08-24 08:44:00

Author:
Ali_Star
Posts: 4085


@ghost500: WRONG. More micros= More thermo. And since the amount of logic and wires is not changed, there will be no change in lag.


I'm not sure that is entirely accurate as it relates to wire lag.

I have one chip that has over 35 individual chips on it each with four wires coming in and four wires coming out. That chip has 16 inputs and 16 outputs. There is 0 wire lag on it since none of the wires cross. I have another chip with 4 inputs and 10 outputs and 10 corresponding AND gates with 4 inputs each. It has wire lag.

While it is true that large amounts of logic will generate some wire lag, a properly laid out circuit should have minimal wire lag. The lag is caused by LBP trying to continually assess the best route for wires and components. The very very very tiny thermo hit from grouping existing logic onto a chip is well worth the benefit of not having to deal with the stopping and starting that comes with a tangled mess of wires.
2011-08-24 16:07:00

Author:
tdarb
Posts: 689


And minimizing won't fix it since it's all on 1 chip.

I think this is one of the fatal flaws of logic design that I've seen in plenty of people's levels. Compartamentalizing and organization are two key factors when creating working logic, and I suppose it's just one of my pet peeves. 75% of my time is spend creating the logic itself and testing, the other 25% is organizing it into compartments.

It may very well be that if you broke up the logic into components and minimized them, the wire lag might go away.

Regardless, if you have tons of complex logic open on the screen, it's going to lag.
2011-08-24 16:57:00

Author:
schm0
Posts: 1239


I think this is one of the fatal flaws of logic design that I've seen in plenty of people's levels. Compartamentalizing and organization are two key factors when creating working logic, and I suppose it's just one of my pet peeves. 75% of my time is spend creating the logic itself and testing, the other 25% is organizing it into compartments.

It may very well be that if you broke up the logic into components and minimized them, the wire lag might go away.

Regardless, if you have tons of complex logic open on the screen, it's going to lag.

You misunderstood. Lol... I meant that minimizing the chip the chip that you're working on doesn't help anything. I know what he's making. I put together the original chip though. If you want, I can upload a picture of it. But everything he needs to work on is on 1 chip. if you minimize it, you can't get to it. That's what I meant to say.
2011-08-25 00:17:00

Author:
Speedynutty68
Posts: 1614


It's not the chips that are laggy, it's the level itself. Like I said, it could just be a connection thing, and the fact that the level is based in such a small area probably has some effect.

But either way, I need to know if scaling the level up, spacing things out a bit more, will reduce the lag.

Sorry to be pushy, but I'm thinking of starting to rebuild my level from a medium grid to a large grid tonight. I need to know if it will be worth it, ie will it reduce lag? I think it will, but I need to be sure because I don't want to go through all that effort for nothing.
2011-08-25 11:23:00

Author:
Ali_Star
Posts: 4085


Yeah, I won't argue against any of that. Wire lag needs to be improved significantly, no matter how the logic is designed. I guess I was getting all meta for a bit there.2011-08-25 14:28:00

Author:
schm0
Posts: 1239


You should see the names I give my chips... Time Circuits... Disintegrate Einstein... Hover Conversion Kit.. Flying Circuits...

NOW that's meta
2011-08-25 15:15:00

Author:
Mr_Fusion
Posts: 1799


I just name my chips the basic function it does... Such as: Main Menu, Zone Selection- Control Chip, Movement, Jump, Over-complicated Timer (Named after I learned an easier way... o.O, and Fighting. All pretty basic... Lol... What I'm trying to work on right now is simplicity and organization. I have just now learned the awesomeness of Nodes! 2011-08-26 01:34:00

Author:
Speedynutty68
Posts: 1614


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