Archive: 6 posts

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http://lbp.me/v/wqzn-q Not sure if this is the best subforum for this or not, but I remade my logic probe (shows both analog and digital parts of a signal) and signal combiner (combines the analog part of one signal with the digital part of another) in the release version of LBP2. Both can be useful when debugging the new logic components. The level also lets you see how they work by using the left and right analog sticks, in case my description isn't clear. LPP.me link here (http://lbp.me/v/wqzn-q) For the curious: This logic probe should also have a somewhat faster response than the one I made in beta, since there's fewer logic steps between the sequencer (which reads the analog signal) and the holograms that display it. My original version was rather convoluted and took a second or so of random-looking display before it stabilized. My second version (that I actually published in beta) used more direct logic to drive the holograms but the sequencer still sent each digit as 4-bit binary to the rest of the logic. In this version the only logic between the sequencer and the hologram display is one or two OR gates (depending on the segment) and a circuit node, so the response should be almost instant.

2011-01-19 15:08:00 Author: Balorn Posts: 92

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Not sure if this is the best subforum for this or not... Moved to Object Showcase. I also added an lbp.me tag to show more info from the level, although feel free to remove it from the post if you don't want it. This logic probe should also have a somewhat faster response... I'm not sure whether this got fixed since the beta, but I made a discovery about logic latency which I posted about in the beta forums... To answer the question "where is latency deliberately inserted?", the answer is "nowhere". Any latency you see is due to the order in which the components' states are re-evaluated on each simulation frame. Each wire can only change state once per simulation frame, so if the components aren't updated in the 'logical' order, then your circuit may take several simulation frames to reach a stable state. The update order is based on the connections between components, so if component A's output is an input for component B, then component A's state will always be re-evaluated before component B's. Where a circuit has feedback, there may be no re-evaluation order which is 'logical' for every possible state transition, so some transitions may show latency. However, there exists what is arguably a bug with the system, which is that some components' inputs on the bottom of the component (such as microchip activate, and selector cycle) don't actually count as dependent connections when the update order is being determined, which is why there is apparent latency in both my selector-based ripple counter, and Foofles' microchip activation cascade circuit, but there is a workaround. Where you're feeding components via one of these problematic inputs, simply create an additional connection between the two components via one of the inputs on the left-hand side of the component, and the re-evaluation order is adjusted to remove the latency. If that doesn't make a whole lot of sense, I've published a copyable example level called "[BUG] Another Latency Issue" which might help to clarify, which was referenced in the bug report I just submitted. The aforementioned level was published on the beta server, so won't be available on the live server, but the beta server is still up for a little while. I'm not 100% certain, but I believe when I tested the Sequencer input, the problem also occurs there, so can be (theoretically) worked around in order to create a zero-latency probe. Of course, this was reported, and may have been fixed, in which case just ignore it.

2011-01-19 18:40:00 Author: Aya042 Posts: 2870

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Queued i liked your probe the most on beta ^^ maybe i will try too build my own in future

2011-01-19 20:21:00 Author: Shadowriver Posts: 3991

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Sounds interesting, i'll give it a play when I get the chance.

2011-01-20 03:41:00 Author: Bremnen Posts: 1800

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Very, very nice! I wasn't in on the beta... I wanted to make a logic probe myself, and so I did. It was a really fun exercise - I wound up taking an approach kind of like your second version, encoding each digit as BCD and then decoding it to 7-segment. (In part 'cause I'm thinking of making some binary adders and such, in which case it'll be handy to have 7-segment displays that take 4-bit input and can display the whole hex range...) Once I implemented mine I took a look to see what other people had implemented and, of course, I found yours. Great tutorial, very nice meter - and I hadn't known that the digital signal is signed, so that's something for me to include in the next version of my meter... My next version will probably be implemented more like yours - direct analog-to-7-segment instead of taking an intermediate step of BCD. I want to make the next one in such a way that I can scale it down really small if I need to - I think the limiting factor in my first version was that the LED segments (based on the ones in the stickers) were too thin when scaled down. So for the second version I'm thinking make the segments rectangular instead of hexagonal, or even go with another approach altogether (like a Nixie-style display...) Still haven't quite figured out how the signal combiner works. I know what it does (that did take me a little while, actually) but I haven't followed the logic quite enough to see how you pick out the digital and analog signals from the respective inputs and combine them...

2011-02-08 18:34:00 Author: tetsujin Posts: 187

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So I think I've come up with a much smaller, presumably latency-free version of the signal combiner. I don't know if people use the signal combiner much but when I first came across it I found it a very useful tool for understanding how LBP logic works and for constructing mismatched signals in order to test the behavior of bits of logic under those "degenerate" conditions... Basically I was looking to use an XOR gate to control the flow of an analog signal (a "relay" basically - this was before I'd learned the trick* to eliminate latency of a microchip-based "relay") - The XOR gate will put out zero analog if both inputs are logical true, so what I had to do was replace the analog signal's logical portion with a "true" condition, and strip off the analog portion of the "digital" signal controlling the "relay", so that, when the "relay" is active, the analog input you want passed through will be the only non-zero one at the XOR gate... In the first attempt at building this thing, I basically re-created the signal combiner - but without sequencers, selectors, or microchip "relays". Pretty much it's just masking out the analog part of the digital input, and masking out the digital part of the analog input, then re-combining them with an OR gate. Since AND gates are used to mask off the unwanted portion of the signal, and since AND always yields a non-negative analog signal**, a direction splitter and combiner were needed on the analog side... The "masking" signals were generated the same as in your signal combiner: (50% battery - NOT 50% battery) = ((+1, +0.5) - (0, +0.5)) to get (+1, 0.0), pass that through a NOT gate to get (0, +1.0)... I'll post a photo later if you're curious... As far as I can tell, it works perfectly. (* The trick, I have heard, is to take the connection that is used to activate the "relay" circuit and also provide it as one of the circuit's inputs (regardless of whether it actually goes anywhere...) This apparently eliminates the normal latency of a simple microchip-based "relay") (** Actually, the LBP Wiki says AND gates output analog positive, unless the digital output is negative... But since the digital output is zero in the portion of the circuit where I mask out the digital part of the analog signal, I guess it always outputs a positive analog signal...)

2011-03-01 20:22:00 Author: tetsujin Posts: 187

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